Semiconductor device models, such as transistor models, are vital in achieving reliable performance from circuit designs using semiconductor devices. Moreover, semiconductor device models can significantly increase the efficiency of the circuit design process. As such, it is desirable to increase the accuracy of such semiconductor device models.
Conventional methods for generating semiconductor device models typically include building a “model card” (also referred to simply as a “model” in the present application) for the semiconductor device by extracting standard device parameters from a measured data set. Simulation data provided by the semiconductor device model is then compared to measured data obtained from physical semiconductor devices to verify the accuracy of the semiconductor device model. However, such a model (or “model card”) fails to provide for new device parameters, and further fails to provide for variations in standard and new device parameters as a result of, for example, different sizes of the semiconductor devices and/or their different positions on a die. Consequently, the semiconductor device models generated using conventional methods may be highly inaccurate.